Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Enlarged color photograph of the Intel® Pentium Pro processor package. Clock speeds: 200, 180, 166, 150 MHz. Number of transistors: 5.5 million (0.35 micron), 256K L2: 15.5 million (0.6 micron), 512K L2: 31 million (0.35 micron). Bus width: 64...
Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Semiconductor wafers; Technology;
Enlarged color photograph of the Intel® Pentium® III microprocessor package. Clock Speeds: 450, 500, 550, and 600 MHz. Number of transistors: 9.5 million (0.25 micron process). L2 cache: 512 KB. System Bus Speed: 100 MHz. System Bus Width: 64 bit...
Electronic industries; Intel microprocessors; Microprocessor packages; MMX technology; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Color slide of the Intel® Pentium® Processor with MMX™ technology package. Clock speeds: 200, 166 MHz. Number of transistors: 4.5 million (0.35 micron CMOS). Bus width: 64 bits (external data bus), 32 bits (address bus). Addressable memory: 4...
Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Semiconductor wafers; Technology;
Enlarged color photograph of the Intel® Pentium® processor package. Clock speeds: 60 MHz (100 MIPS, 70.4 SPECint92, 55.1 SPECfp92 on Xpress 256K L2). 66 MHz (112 MIPS, 77.9 SPECint92, 63.6 SPECfp92 on Xpress 256K L2). Number of transistors: 3.1...
Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Enlarged color photograph of the Intel® Celeron® processor package. Clock speeds: 266 MHz. Transistor Count: 7.5 million (0.25 micron process)Single Edge Processor Package (SEPP), 242 pins. Bus Speed: 66MHz. Bus Width: 64 bit system bus....
Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Semiconductor wafers; Technology;
Color slide of the Intel® 8080 microprocessor package. Clock speed: 2 MHz. Transistor Count: 4,500. Chip Performance: 29 (64) MIPS (millions of instructions per second). Circuit Line Size: 4.5 microns. Bus width: 8 bits. Addressable memory: 64...
Electronic industries; Memory chip packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Enlarged black-and-white photograph of the Intel® Schottky 3101 Bipolar Ram Memory chip package. The 3101 is the world's first solid state memory device and Intel's first product. The 3101 used Schottky barrier diode, bipolar technology. The...
Electronic industries; Intel microprocessors; Memory dies; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Enlarged black-and-white photograph of the Intel® 1702A Memory Die. Invented by Dov Frohman, the 1702 was the first easily erasable storage medium. Intel's 1702 EPROM gave OEM's a flexible low-cost way to store microprocessor programs.
Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Enlarged black-and-white photograph of the i486 microprocessor package. Clock speeds: 25 MHz (20 MIPS, 16.8. Number of transistors: 1,200,000 (1 micron, with 50 MHz at .8 micron). Bus width: 32 bits. Addressable memory: 4 gigabytes. Virtual...
Electronic industries; Intel microprocessors; Microprocessor packages; Photographs; Santa Clara (Calif.); Santa Clara County (Calif.)--History; Technology;
Color photograph of the i386 microprocessor package. Clock speeds: 16 MHz (5 to 6 MIPS) 20 MHz introduced February 16, 1987 (6 to 7 MIPS) 25 MHz introduced April 4, 1988 (8.5 MIPS) 33 MHz introduced April 10, 1989 (11.4 MIPS, 9.4 SPECint92 on...
Anselmo de Jesus; Carolina Maria; Cosme; Justa Maria; Maria Concepcion; Maria Encarnacion; Maria Thomasa; Murguia, Joseph Antonio; Nicolas Maria; Serra, Junipero; Ysidoro Antonio; de la Peña, Thomas
Records of burials performed at Mission Santa Clara between 1777 and 1850
Photographs; Santa Clara College (Calif.); Students
Group portrait of contributors to 4th Latin taken adjacent to ivy-covered adobe wall. Standing (L to R): 1) Chas Kuster, 2) J. Peters, 3) [un-named] 4) R. Trimble, 5) Owen Slavin, 6) [un-named] 7) Ed Sheehy, 8) [un-named], 9) Hugh Fitzpatrick, 10)...
